Sau-Ching Wong
Patent drawing from US 5,909,449, Multi-bit-per-cell non-volatile memory with error detection and correctionPatent drawing from US 5,909,449, Multi-bit-per-cell non-volatile memory with error detection and correctionPatent drawing from US 5,909,449, Multi-bit-per-cell non-volatile memory with error detection and correctionPatent drawing from US 5,909,449, Multi-bit-per-cell non-volatile memory with error detection and correction

US 5,909,449

Multi-bit-per-cell non-volatile memory with error detection and correction

Filed
September 8, 1997
Granted
June 1, 1999
Assignee
Sandisk (Invox)
Inventors
Hock C. So, Sau C. Wong

Abstract

A multilevel non-volatile memory divides the suitable threshold voltages of memory cells into ranges corresponding to allowed states for storage of data and ranges corresponding to forbidden zones indicating a data error. A read process in accordance automatically checks whether a threshold voltage is in a forbidden zone. In alternative embodiment, a refresh process includes reprogramming the threshold voltage into an allowed state or in the case of a flash memory, reading a sector of the memory, saving data from the sector in a buffer, erasing the sector, and rewriting the data from the buffer back in the sector. Refresh process for the non-volatile memory can be perform in response to detecting a threshold voltage in a forbidden zone, as part of a power-up procedure for the memory, or periodically with a period on the order of days, weeks, or months.

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