



US 7,139,192
Programming of multi-level memory cells on a continuous word line
- Filed
- February 6, 2004
- Granted
- November 21, 2006
- Assignee
- Samsung
- Inventors
- Sau Ching Wong
Abstract
Write operations that simultaneously program multiple memory cells on the same word line in an MBPC or MLC non-volatile memory employ word line voltage variation, programming pulse width variation, and column line voltage variation to achieve uniform programming accuracy across a range of target threshold voltages. One type of write operation reaches target threshold voltages during respective time intervals and in each time interval uses programming parameters that optimize threshold voltage resolution for the target threshold voltage corresponding to that interval. During or at the end of write operations or the ends of each interval, remedial programming sequences can adjust the threshold voltages of memory cells that program slowly.