Flash memory array partitioning architectures

Abstract

A Flash memory employs uniform-size blocks in array planes and has separate read and write paths connected to the array planes. The read path can read from one array plane while the write path writes in another array plane and one or more blocks are being erased. The uniform block size permits a symmetric layout and provides maximum flexibility in storage of data, code, and parameters. The uniform block size also allows spare blocks in the array planes to replace of any defective blocks. A redundancy system for the Flash memory uses a CAM and a RAM for address comparison and substitution to replace addresses corresponding to defective memory elements. To reduce access delays, part of the input address such as the row address goes directly to decoders, while another part of the input address such as the block address goes to the CAM array.