High resolution analog storage EPROM and flash EPROM

Abstract

Circuits and processes write and read analog signals in non-volatile memory cells such as EPROM and flash EPROM cells. One write process applies a control gate voltage which provides a saturation threshold voltage near a target threshold voltage being written. A verify feedback process terminates the write when the target threshold voltage is reached. Variable write pulse widths, voltages, and loadline resistances reduce write time and further improve control of writing. The fast write time of EPROM and flash EPROM cells simplifies control of write processes and therefore reduces chip size and cost in applications such as sound recording. A read process reads a memory cell's threshold voltage using substantially the same circuit as used in the verify feedback process. One read process determines a memory cell's threshold voltage by slowly ramping the control gate voltage and sensing when the cell conducts. Read and write processes disclosed also apply to binary memory cells, multi-level digital memory cells, and other applications which require precise reading or writing of threshold voltages.