Analog and multi-level memory with reduced program disturb

Abstract

Applying a bias voltage to unselected word-lines reduces program disturb of the threshold voltages of unselected memory cells during a write to a non-volatile memory. Applying the bias voltage only to memory cells which have already been written with threshold voltages higher than a minimum value and not to erased (or virgin) memory cells allows the bias voltage to be higher without creating currents through unselected memory cells. Data such as a series of samples representing a continuous analog signal can be recorded by writing to sequential addresses to fill one row in an array with data before writing to the next row. Bias flag circuits in a row decoder of the memory indicate which rows are filled with data and therefore which word-lines should have the bias voltage applied during a write.